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Design & Reuse 作為全球唯一獨(dú)立的專業(yè)IP搜索引擎,已經(jīng)走過了20個(gè)春秋。450多個(gè)來自不同國(guó)家和地區(qū)的IP供應(yīng)商,選擇D&R作為他們與終端用戶溝通的橋梁與信息交換的重要渠道。其7X24小時(shí)在線的強(qiáng)勁引擎攜15,000個(gè)持續(xù)更新的IP產(chǎn)品,為世界各地35,000多位專業(yè)的注冊(cè)用戶提供無可匹敵的IP產(chǎn)品及供應(yīng)商資源。
Design & Reuse 在全球范圍內(nèi)連續(xù)16年堅(jiān)持開展基于IP復(fù)用技術(shù)的專業(yè)技術(shù)大會(huì),為供應(yīng)商與用戶見面交流開創(chuàng)機(jī)遇與平臺(tái),為IP復(fù)用技術(shù)的社區(qū)建設(shè)及發(fā)展堅(jiān)持不懈地做出自己的努力與積極的貢獻(xiàn)。
作為其全球IP-SoC Days的重要部份,本活動(dòng)于七年前登陸中國(guó)。2017年9月14日在上海 Design & Reuse 將繼續(xù)為中國(guó)用戶及相關(guān)供應(yīng)商帶來IP-SoC Day,這將是海內(nèi)外IP供應(yīng)商與中國(guó)用戶面對(duì)面交流的IP技術(shù)盛會(huì)!
本次大會(huì)與中芯國(guó)際的技術(shù)大會(huì)(上海2017年9月13日)緊密配合,為您提供一次獨(dú)一無二的機(jī)會(huì)來探討基于IP復(fù)用的芯片開發(fā)與設(shè)計(jì)技術(shù)發(fā)展與挑戰(zhàn),如何應(yīng)對(duì)速度更快、集成度更高、功耗更低的用戶需求;與技術(shù)專家一起交流最新的IP技術(shù)進(jìn)展及其企業(yè)應(yīng)用,共同探討創(chuàng)新雙贏的商業(yè)模式。
1.作為業(yè)內(nèi)人士的您被邀請(qǐng)參與其中
2.約有近20家來自不同國(guó)家和地區(qū)的IP供應(yīng)商正積極準(zhǔn)備參加此次盛會(huì),請(qǐng)?jiān)谧?cè)時(shí)告訴我們您感興趣的供應(yīng)商和IP產(chǎn)品,您將有機(jī)會(huì)獲得與目標(biāo)供應(yīng)商單獨(dú)會(huì)面的機(jī)會(huì)
3.注冊(cè)參與便有機(jī)會(huì)獲得精美小禮品及大會(huì)手冊(cè)各一份
4.免費(fèi)提供會(huì)議酒店自助午餐,與業(yè)內(nèi)人士交流
IP SoCDays 上海展會(huì)指南
Date: September 14th, 2017
Time:
ConferenceTime: 09:00am – 17:30pm
LunchBuffet: 12:00pm – 13:00pm
Venue:
EvergreenLaurel Hotel (Shanghai) 長(zhǎng)榮桂冠酒店(上海)
NO. 1136, ZuChongZhiRoad, Pudong District, Shanghai 201203, China
上海市浦東新區(qū)祖沖之路1136號(hào),近金科路
Tel: +86-21-80169988
Web: http://www.evergreen-hotel-shanghai.com/
Map:
Join D&R User Group meeting on September 13th and celebrate D&R 20th Anniversary.
This meeting is a brainstorming meeting to explore how D&R services can better serve the worldwide IP community.
5.30 pm |
D&R website and new Alerts |
6.00 p.m |
What’s new in IPMS? latest version (D&R Intranet IP Management system) for IP consumers and IP providers |
6.30 pm | Let's celebrate D&R 20th anniversary |
9:00 |
Introductory Session
Chairperson : Gabrièle Saucier (D&R) D&R the catalyst of IP business for 2 decades: which vision? which future?
by Gabriele Saucier
CEO, Design & Reuse
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SMIC Solutions for Your Needs
by Hongying Wu
Director of Design Enablement Center, SMIC
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Changing Dynamic in semiconductor industry
by Samir Patel
CEO, Sankalp Semiconductor
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SoC enablers with proven YouIP and Platforms
by John Zhuang
CTO, Brite Semiconductor Inc.
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11:00 |
Break
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11:30 |
Session 2: IoT the next opportunity
Chairperson: Samir Patel (Sankalp SemiConductor) How to design an IoT SoC and get ARM CPU IP for no upfront license fee
by Phil Burr
Senior Product Marketing Manager, ARM
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IP Solutions for Securing IoT Devices
by Matthew Ma
Synopsys Inc.
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IP blocks for Storage, Networking and IoT
by Amit Saxena
VP of Engineering, Mobiveil Inc.
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Awareness of IoT Security vulnerabilities regarding hardware-involved attack scenarios
by Charles Thooris
Sales & Marketing Director, Secure IC S.A.S.
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13:00 |
Lunch Break
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14:00 |
Session 3a: eFPGA a new vision of programmable blocks
Chairperson: Mark Ma (Jiatao China) |
Session 3b: IP based solutions
Chairperson: Philippe Burr ( Arm) |
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eFPGA Comes of Age
by Itsu Wang
Sr Director, Asia Sales and Marketing, QuickLogic Corp.
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Standalone,
Highly Flexible, Low-Power, and Scalable Neural Network DSP for AR/VR,
Automotive, Mobile, and Surveillance Applications
by Wendy Chen
Program Management Director, Asia-Pac IP Business, Cadence Design Systems Inc.
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Flexible Trusted eFPGA
by Imen Baili
Menta S.A.S.
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Building a Silicon Area Optimized Multi-format Video Encoder IP
by Tomi Jalonen
VP Sales, ALLEGRO DVT
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eFPGAs - Revolutionizing the high performance computing landscape
by Eric Law,
Achronix
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Configuring DDR IP to Enhance Design Speed and Minimize Design Footprint
by Bruce Luo,
GM of Greater China, Uniquify Inc.
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15:00 |
Break |
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15:30 |
Session 4a: Design Methodology
Chairperson: Matthew Ma, (Synopsys Inc.) |
Session 4b: Interface IP
Chairperson: Wendy Chen (Cadence Design Systems Inc.) |
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Improving Battery Powered Device Operation Time Thanks to Power Efficient Sleep Mode
by Ying Zhao
Dolphin Integration
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Guide to Choosing the right PCIe Controller+PHY Combo
by Rex Yu
FAE Manager - Asia, PLDA
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Reaching Working Silicon - Addressing the challenges of in-chip conditions on 28nm & FinFET
by Naseer Khan
VP of sales, Moortec Semiconductor Ltd.
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High Speed SERDES new standards
by Yossi Yehiel
VP Sales & Marketing, Silabtech Pvt Ltd.
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Embedded analytics delivers system-wide visibility for debug, safety, security and more...
by Gajinder Panesar
CTO, UltraSoC Technologies Ltd.
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USB 3.1
by Blend Fang
Senior Sales Director at Corigine, Inc.
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16:30 |
Lucky Draw
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電 話 : (+86) 21-5899 6106 (+86) 21-5875 7196
傳 真 : (+86) 21-5899 6108
郵 編 :200122
郵 箱 :[email protected]
地 址 :上海市浦東新區(qū)嶗山路528號(hào)江蘇大廈14樓C1
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